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<?xml version="1.0" standalone="yes"?> <Paper uid="H92-1119"> <Title>REAL-TIME SPEECH RECOGNITION SYSTEM</Title> <Section position="1" start_page="0" end_page="0" type="metho"> <SectionTitle> REAL-TIME SPEECH RECOGNITION SYSTEM Mitchel Weintraub SRI International </SectionTitle> <Paragraph position="0"/> </Section> <Section position="2" start_page="0" end_page="0" type="metho"> <SectionTitle> PROJECT GOALS </SectionTitle> <Paragraph position="0"> SRI and U.C.Berkeley are developing hardware for a real-time implementation of spoken language systems (SLS).</Paragraph> <Paragraph position="1"> Our goal is to develop fast speech recognition algorithms and supporting hardware capable of recognizing continuous speech from a bigram or trigram based 10,000 word vocabulary or a 1,000 to 5,000 word SLS system.</Paragraph> </Section> <Section position="3" start_page="0" end_page="0" type="metho"> <SectionTitle> RECENT RESULTS </SectionTitle> <Paragraph position="0"> The special-purpose system achieves its high computation rate by using special-purpose memories and data paths, and is made up of the following several components: * A special-purpose HMM-board with eight newly designed integrated circuits that does the HMM inner-loop processing to implement the word-recognition algorithms.</Paragraph> <Paragraph position="1"> * An output-distribution board made of off-the-shelf components for computing HMM discrete-density state-output probabilities.</Paragraph> <Paragraph position="2"> * A multi-processor TMS32030 board for computing the statistical language processing. This board has a custom high-speed interface to the HMM-board.</Paragraph> <Paragraph position="3"> * A general-purpose CPU board to perform system control.</Paragraph> <Paragraph position="4"> * A DSP board with A/D convertor for computing the feature extraction.</Paragraph> <Paragraph position="5"> * A Sun workstation for computing the spoken language system database retrieval and human machine interface.</Paragraph> <Paragraph position="6"> SRI and U.C. Berkeley's recent accomplishments on this project include: * Completed the construction of a working hardware prototype. This prototype has been demonstrated running the Resource Management (RM) task as well as the Airline Travel Information System (ATIS) task.</Paragraph> <Paragraph position="7"> * Began intensive use of the hardware for a real-time Airline Travel Information System (ATIS) task. * Completed the design and construction of a second generation multiprocessor TMS32030 grammar processing board. Testing is currently in progress. * Revised and corrected errors in several of the custom VLSI chips that are used for the HMM wordrecognition processor.</Paragraph> </Section> <Section position="4" start_page="0" end_page="486" type="metho"> <SectionTitle> PLANS FOR THE COMING YEAR * Complete the construction and testing of the second </SectionTitle> <Paragraph position="0"> generation multiple-processor TMS32030 board with a high I/O bandwidth to interface with the special-purpose HMM-board.</Paragraph> <Paragraph position="1"> * Implement multiple types of grammars using this hardware.</Paragraph> <Paragraph position="2"> * Collect data about man-machine speech interactions using the real-time hardware.</Paragraph> <Paragraph position="3"> * Integrate the real-time recognizer into our research to shorten the development cycle for new systems * Evaluate the current architecture to determine the computational and algorithmic bottlenecks.</Paragraph> <Paragraph position="4"> * Deliver a hardware prototype to DARPA.</Paragraph> </Section> class="xml-element"></Paper>